In the fabrication of semiconductor devices, it can be useful to co-integrate semiconductor structures comprising different semiconductor materials, such as different channel materials. However, this co-integration can be challenging to achieve. A first issue may for example be due to difficulty in epitaxial growth of a first semiconductor material on a different semiconductor material. A further issue may also be the increased complexity of the device layout and its impact on several modules, e.g. separate internal spacer modules may be necessary for the different channel materials and making these is typically not trivial. An additional issue could also be the vertical misalignment between the different semiconductor materials, e.g. in the case where an alternating stack of Si and SiGe layers is formed, wherein alternatively Si and SiGe are selectively etched with respect to one another, the remaining Si and SiGe structures will be vertically displaced with respect to each other.
U.S. Pat. No. 9,257,450 B2 describes a method for forming a stack of alternating layers of first and second semiconductor materials, forming fins from the stack and selectively removing sidewall portions of the second semiconductor material from the fins to define recesses therein. A possible method for integrating semiconductor structures of differing chemical natures is further disclosed as forming different stacks of alternating layers, comprising different first and second semiconductor materials, in different regions on the substrate; however, forming such diverse stacks on a substrate is typically not trivial. This may be the case when a close integration of the different materials is desired, including the formation of closely packed stacks of small dimensions.
There is thus still a need in the art for methods and devices which improve some or all of these issues.